1. Field of the Invention
The present invention relates to cable television (CATV) tuners and one-chip integrated circuits (IC) used therein. More particularly, the present invention relates to an up/down tuner for converting a received signal into a first intermediate frequency, which is a higher frequency signal, and for further converting the first intermediate frequency into a second intermediate frequency, which is a lower frequency signal. The present invention also pertains to a one-chip IC used in this type of up/down tuner.
2. Description of the Related Art
FIG. 4 is a schematic view illustrating an example of a known CATV tuner. A CATV tuner 1 includes a metallic housing 2. The housing 2 is divided into six partitioned chambers 2A, 2B, 2C, 2D, 2E, and 2F.
In the partitioned chamber 2A, a data circuit 10 is housed therein. The data circuit 10 includes, as shown in FIG. 5, a first low-pass filter 12 and a branch circuit 14 to which an input portion IN is connected. A cable from a CATV station is connected to the input portion IN, and a received RF signal is branched at the branch circuit 14. One branched signal is supplied to a subsequent circuit, and the other branched signal is supplied to a terminal DOWN and is output from the CATV tuner 1. The first low-pass filter 12 is connected to an upstream terminal UP. In interactive broadcasting, a signal to be output to the CATV station is output to the cable connected to the input terminal IN via the first low-pass filter 12.
In the partitioned chamber 2B, an input filter circuit 16 is housed therein, as shown in FIG. 4. The input filter circuit 16 includes, as shown in FIG. 5, a first band-pass filter 18 and an attenuator circuit 20. The RF signal passing through the data circuit 10 is filtered in the first band-pass filter 18 and is attenuated in the attenuator circuit 20. A control signal is input into the attenuator circuit 20 from an external gain control circuit via a terminal AGC. The RF signal is attenuated so that the gain is adjusted by this control signal. Because of the attenuation of the RF signal, the intensity of the RF signal input into a first amplifier 22 is suitably adjusted, and distortion of the signal generated in the CATV tuner 1 is reduced.
In the partitioned chamber 2C, the first amplifier 22 and a first mixer circuit 24 are housed therein. The signal attenuated in the attenuator circuit 20 is amplified in the first amplifier 22, and is mixed with a first local oscillation signal in the first mixer circuit 24, resulting in a first intermediate frequency signal, which is a higher frequency signal than the RF signal.
In the partitioned chamber 2C, a first local oscillation circuit 26 for supplying the first local oscillation signal to the first mixer circuit 24 is also housed therein. The first local oscillation circuit 26 includes a first phase-locked loop circuit (hereinafter referred to as the “PLL circuit”) 28 and a first voltage-controlled oscillator 30. A quartz oscillator 32 for supplying a reference frequency signal is connected to the first PLL circuit 28. The frequency of the signal output from the first PLL circuit 28 is adjusted by a channel-selection data signal supplied from a terminal SDA and a clock signal supplied from a terminal SCL. The signal output from the first PLL circuit 28 controls the frequency of the voltage-controlled oscillator 30, resulting in the first local oscillation signal being produced. This first local oscillation signal is supplied to the first mixer circuit 24, and the first intermediate frequency signal, which is a higher frequency signal than the RF signal, is output from the first mixer circuit 24.
In the partitioned chamber 2D, a first intermediate frequency circuit 34 is housed therein. The first intermediate frequency circuit 34 includes a second band-pass filter 36, a second amplifier 38, and a third band-pass filter 40. In the first intermediate frequency circuit 34, the first intermediate frequency signal is filtered and amplified.
In the partitioned chamber 2E, a second mixer circuit 42 and a second intermediate frequency circuit 44 are housed therein. The second intermediate frequency circuit 44 includes a second low-pass filter 46, a third amplifier 48, a fourth band-pass filter 50, and a fourth amplifier 52. In the second mixer circuit 42, a signal output from the third band-pass filter 40 is mixed with a second local oscillation signal, and a resulting second intermediate frequency signal is supplied to the second intermediate frequency circuit 44.
In the partitioned chamber 2F, a second local oscillation circuit 54 for supplying the second local oscillation signal is housed therein. The second local oscillation circuit 54 includes a second PLL circuit 56 and a second voltage-controlled oscillator 58. A reference frequency signal is distributed from the first PLL circuit 28, and is supplied to the second PLL circuit 56 via a distribution line 60. Noise is easily mixed into the reference frequency signal, which is transmitted from the first PLL circuit 28 to the second PLL circuit 56, and thus, a noise-eliminating filter 62 is attached to the distribution line 60.
The frequency of the signal output from the second PLL circuit 56 is adjusted by a data signal supplied via a terminal SDA, which is not connected to the first PLL circuit 28, and a clock signal supplied via a terminal SCL. A signal from the second PLL circuit 56 controls the frequency of the second voltage-controlled oscillator 58, resulting in the second local oscillation signal being produced. The second local oscillation signal is supplied to the second mixer circuit 42, and the second mixer circuit 42 outputs the second intermediate frequency signal, which is a lower frequency signal than the RF signal. The second intermediate frequency signal is filtered and amplified in the second intermediate frequency circuit 44, and is supplied to an output terminal OUT.
As shown in FIG. 6, the housing 2 includes a partitioned frame 3, and metallic covers 4a and 4b, which respectively cover the top and the bottom surfaces of the frame 3. For improving the shielding characteristic, metallic plates 5a and 5b are inserted between the frame 3 and the cover 4a and between the frame 3 and the cover 4b, respectively. For connecting the CATV tuner 1 to an external circuit, as shown in FIG. 4, a plurality of terminals 6 including the terminals SDA and the terminals SCL are arranged such that they project from the housing 2 to the exterior. A feedthrough capacitor is soldered to the frame 3 such that the terminals 6 pass through the feedthrough capacitor, thereby preventing interference between signal components, which may leak from the first local oscillation circuit 26 and the second oscillation circuit 54 via the terminals 6.
In the CATV tuner 1, since a received RF signal has a very wide frequency range, for example, from 55 MHz to 860 MHz, it is first mixed with the first local oscillation signal (for example, having a frequency of 1.28 GHz to 2.1 GHz) output from the first local oscillation circuit 26, and is converted into the first intermediate frequency signal (for example, having a central frequency of 1.23 GHz and a bandwidth of 6 MHz), which is a higher frequency signal than the RF signal. Simultaneously, the channel is selected by the data signal supplied to the first PLL circuit 28.
In the second mixer circuit 42, the first intermediate frequency signal is mixed with the second local oscillation signal (fixed at, for example, 1.185 GHz) output from the second local oscillation circuit 54, and is converted into the second intermediate frequency signal (having a central frequency of 44 MHz and a bandwidth of 6 MHz), which is a lower frequency signal than the RF signal. In this manner, the RF signal is converted into the first intermediate frequency signal, which is higher than the RF signal, and is then converted into the second intermediate frequency signal, which is lower than the RF signal. Accordingly, such a CATV tuner is referred to as an “up/down tuner”.
In such a CATV tuner, a single balanced mixer (SBM) or a double balanced mixer (DBM) is used as the first mixer circuit 24 so as to suppress distortion even if the RF signal contains adjacent channels. Local oscillation signals having a power that is a few hundred times as high as the RF signal are input to the first and second mixer circuits 24 and 42. Accordingly, fundamental waves and higher harmonics, which may leak from the first local oscillation circuit 26 and from the second local oscillation circuit 54 to the first and second mixer circuits and 24 and 42, may cause the generation of a signal (interfering waves) indicating the sum or the difference of the signal components of the first and second local oscillation circuits 26 and 54.
In order to avoid the generation of interfering waves, interference between signals output from the first local oscillation circuit 26 and the second local oscillation circuit 54 must be prevented. For this purpose, in the CATV tuner 1, the circuit blocks, such as the first local oscillation circuit 26 and the second local oscillation circuit 54, are located in the partitioned chambers exhibiting a shielding characteristic. It should be noted that partitioned chambers, which are used in a CATV tuner, are not necessarily used in a simple down-tuner, such as a terrestrial receiving tuner.
Even in a CATV tuner in which circuit blocks are located in partitioned chambers, it is difficult to sufficiently prevent interference between first and second local oscillation circuits if they are located adjacent to each other. Accordingly, in the CATV tuner 1, the first local oscillation circuit 26 and the second local oscillation circuit 54 are separated to be as far apart as possible, and the other partitioned chambers are located therebetween. Also, the metallic plates 5a and 5b are inserted between the partitioned frame 3 and the covers 4a and 4b, as discussed above, thereby preventing interference, which would otherwise be generated between the first and second local oscillation circuits 26 and 54.
In a known CATV tuner, however, since a first PLL circuit and a second PLL circuit are separated from each other, noise is easily mixed into a distribution line for distributing a reference frequency signal of the first PLL circuit to the second PLL circuit, and a noise eliminating filter has to be attached to the distribution line. Additionally, terminals for supplying a clock signal and a data signal must be provided for each of the first PLL circuit and the second PLL circuit. This increases the number of terminals, thereby making the resulting CATV tuner larger.
A feedthrough capacitor is attached to a frame so as to prevent leakage of signal components from the first local oscillation circuit and the second local oscillation circuit via terminals. However, this increases the cost for additional parts, and also, the fixing operation is required, thereby increasing the overall cost of the CATV tuner. Additionally, metallic plates, which are inserted between the partitioned chambers and the cover, also increase the overall cost.